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GPU Frame Buffer
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POS Register - GPU Frame Buffer
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Device
Data-
Sheet
Device Description
V
IN
(min) (V)
V
IN
(max) (V)
V
OUT1
(min) (V)
V
OUT1
(max) (V)
V
OUT2
(V)
I
OUT1
(A)
I
OUT2
(A)
V
BIAS
(V)
100-999 Unit MSRP
($)
Package
ISL6529
Dual Regulator-Synchronous Rectified Buck PWM and Linear Power Controller
3.3
5
0.8
3.3
0.8 to 3.3
15
4
12
2.67
14 Ld SOIC
14 Ld SOIC T+R
16 Ld QFN
16 Ld QFN T+R
Eval Board
Device
Data-
Sheet
Device Description
V
IN
(min) (V)
V
IN
(max) (V)
V
OUT1
(min) (V)
V
OUT1
(max) (V)
V
OUT2
(V)
V
OUT3
(V)
I
OUT1
(A)
I
OUT2
(A)
100-999 Unit MSRP
($)
Package
ISL6534
Dual PWM with Linear
3.3
12
0.6
9
0.6 to 9
Adj.
20
20
1.21
24 Ld EPTSSOP
24 Ld EPTSSOP T+R
32 Ld QFN
32 Ld QFN T+R
Eval Board
*Data listed above is for reference only, please refer to Product Data Sheets for current specifications.