Device Information
 
 
X98017 Printer Friendly Version
170MHz Triple Video Digitizer with Digital PLL
 
Features DescriptioniSim Design Simulation
Technical DocumentationTools And Support
Pricing / SamplesRelated Devices
 
Buy Direct from Intersil
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 X98017L128-3.3-ZOut of stock
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X98017L128-3.3Details
X98017L128-3.3-ZDetails
Datasheet
Adobe Acrobat Document X98017
170MHz Triple Video Digitizer with Digital PLL
Resolution (Bits)8
Max Conversion Rate (MSPS)170
Typical PLL Jitter (ps) (p-p)250
Sync MeasurementN
Auto Phase AdjustN
Typical Power Dissipation @ Max Conversion Rate (mW)1030
 

Product Information

Key Features
  • 170MSPS maximum conversion rate
  • Low PLL clock jitter (250ps p-p @ 170MSPS)
  • 64 interpixel sampling positions
  • 0.35VP-P to 1.4VP-P video input range
  • Programmable bandwidth (100MHz to 780MHz)
  • 2 channel input multiplexer
  • RGB and YUV 4:2:2 output formats
  • 5 embedded voltage regulators allow operation from single 3.3V supply and enhance performance, isolation
  • Completely independent 8 bit gain/10 bit offset control
  • CSYNC and SOG support
  • Trilevel sync detection
  • 1.05W typical PD @ 170MSPS
  • Pb-Free Available (RoHS Compliant)
Description

The X98017 3-channel, 8-bit Analog Front End (AFE) contains all the components necessary to digitize analog RGB or YUV graphics signals from personal computers, workstations and video set-top boxes. The fully differential analog design provides high PSRR and dynamic performance to meet the stringent requirements of the graphics display industry. The AFE's 170MSPS conversion rate supports resolutions up to UXGA at 60Hz refresh rate, while the front end's high input bandwidth ensures sharp images at the highest resolutions.

To minimize noise, the X98017's analog section features 2 sets of pseudo-differential RGB inputs with programmable input bandwidth, as well as internal DC restore clamping (including mid-scale clamping for YUV signals). This is followed by the programmable gain/offset stage and the three 170MSPS Analog-to-Digital Converters (ADCs). Automatic Black Level Compensation (ABLC™) eliminates part-to-part offset variation, ensuring perfect black level performance in every application.

The X98017's digital PLL generates a pixel clock from the analog source's HSYNC or SOG (Sync-On-Green) signals. Pixel clock output frequencies range from 10MHz to 170MHz with sampling clock jitter of 250ps peak to peak.

Pricing / Packaging / Samples / Ordering

 iBuy direct from Intersil iBuy direct - out of stock Request samples
 Check distributor inventoryGreen/Pb(Lead free) Device Available in RoHS/Pb-Free 
Part No.Design-In
Status
Temp.PackageMSLPrice
US $
PB Free
X98017L128-3.3 Active Comm 128 Ld MQFP 2A 18.78   Disti-Buy  
X98017L128-3.3-Z Active Comm 128 Ld MQFP 2A 15.65 PB Free Out of stock Disti-Buy  
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing

Technical Documentation

Datasheet(s):
Evaluation Board(s):
Technical Homepage:
Tools And Support
iSim Design Simulation
No Models Available
Design Model(s):
Applications
  • LCD Monitors and Projectors
  • Digital TVs
  • Plasma Display Panels
  • RGB Graphics Processing
  • Scan Converters
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