Device Information
 
 
X79000 Printer Friendly Version
 
NV DAC with Selectable Output Range and Memory
 
Datasheets,
Related Docs
& Simulations
DescriptionKey
Features
Parametric
Data
Application
Diagrams
 
 
Ordering Information
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Part No. Design-In
Status
Temp. Package MSL Price
US $
PB Free
X79000V20I InActive Ind 20 Ld TSSOP 1 N/A      
X79000V20IT1 InActive Ind 20 Ld TSSOP T+R 1 N/A      
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
 
  Description

The X79000 is a family of Single Channel Non-Volatile (NV) Digital-to-Analog Converters with integrated voltage reference, configurable output buffer, general purpose EEPROM, and selectable full scale and zero offset voltages.

The X79000 series implements an SPI serial bus interface with slave address identification allowing up to 32 devices on some options. The full scale and zero scale voltages and the DAC initial value register can be set via the SPI bus interface. Optional pins are provided for Up/Down style interface allowing for increment and decrement of the DAC register in 1, 4, or 16 steps at a time.

A Power-on Recall circuit is implemented to keep the DAC output at high impedance on power-up and to load an initial user defined value from non-volatile memory. A power-up ready signal is provided to alert the system to begin operations.

Additional general purpose non-volatile memory (56 Bytes) is provided for curve-fit profile setting, signal conditioning parameters, or device and system indentification.

 
  Key Features
 
  • 12-Bit Resolution
  • Selectable full scale and zero scale voltages
  • Optional External full scale and zero scale references
  • Programmable, non-volatile DAC initial value register
  • Optional UP/DOWN interface
  • Guaranteed Monotonic Operation, <0.5LSB DNL
  • Buffered Output Option
  • Integrated Voltage Reference Option
  • Voltage Reference Output (1.21V) Option
  • 6 µs settling time, full scale
  • SPI interface, 5MHz
  • Up to 5 slave Address Pins
  • Power-up recall and ready output
  • 56 Bytes of general purpose EEPROM
  • Asynchronous clear pin and control bit
  • VCC = 5V ±10%
  • 20-lead TSSOP
  • NV DAC
Related Documentation
 
Application Note(s)   Application Note(s):
 
Datasheet(s)   Datasheet(s):
 
 
  Parametric Data
Resolution (Bits)12
Conv. Rate (MSPS).417
Output I/VV
Tech.CMOS
Max Power Supply VS5.5
INL (max) (±LSB)10
DNL (max) (±LSB).5
VREFInt/Ext
 
  Application Block Diagrams
 

 

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