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| NV DAC with Selectable Output Range and Memory |
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| Ordering Information |
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iBuy direct from Intersil
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iBuy direct - out of stock
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Request samples
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Check distributor inventory
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Part No. |
Design-In Status |
Temp. |
Package |
MSL |
Price US $ |
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 | X79000V20I |
InActive |
Ind |
20 Ld TSSOP |
1 |
N/A |
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 | X79000V20IT1 |
InActive |
Ind |
20 Ld TSSOP T+R |
1 |
N/A |
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| The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice. |
| MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020 |
| SMD = Standard Microcircuit Drawing |
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Description |
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The X79000 is a family of Single Channel Non-Volatile (NV) Digital-to-Analog Converters with integrated voltage reference, configurable output buffer, general purpose EEPROM, and selectable full scale and zero offset voltages.
The X79000 series implements an SPI serial bus interface with slave address identification allowing up to 32 devices on some options. The full scale and zero scale voltages and the DAC initial value register can be set via the SPI bus interface. Optional pins are provided for Up/Down style interface allowing for increment and decrement of the DAC register in 1, 4, or 16 steps at a time.
A Power-on Recall circuit is implemented to keep the DAC output at high impedance on power-up and to load an initial user defined value from non-volatile memory. A power-up ready signal is provided to alert the system to begin operations.
Additional general purpose non-volatile memory (56 Bytes) is provided for curve-fit profile setting, signal conditioning parameters, or device and system indentification. |
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Key Features |
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12-Bit Resolution
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Selectable full scale and zero scale voltages
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Optional External full scale and zero scale references
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Programmable, non-volatile DAC initial value register
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Optional UP/DOWN interface
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Guaranteed Monotonic Operation, <0.5LSB DNL
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Buffered Output Option
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Integrated Voltage Reference Option
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Voltage Reference Output (1.21V) Option
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6 µs settling time, full scale
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SPI interface, 5MHz
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Up to 5 slave Address Pins
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Power-up recall and ready output
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56 Bytes of general purpose EEPROM
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Asynchronous clear pin and control bit
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VCC = 5V ±10%
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20-lead TSSOP
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NV DAC
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| Related Documentation |
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Application Note(s): |
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Datasheet(s): |
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Parametric Data |
 | | Resolution (Bits) |  | 12 |  | | Conv. Rate (MSPS) |  | .417 |  | | Output I/V |  | V |  | | Tech. |  | CMOS |  | | Max Power Supply VS |  | 5.5 |  | | INL (max) (±LSB) |  | 10 |  | | DNL (max) (±LSB) |  | .5 |  | | VREF |  | Int/Ext |  |
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Application Block Diagrams |
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