Device Information
 
 
X40010 Printer Friendly Version
 
Dual Voltage Monitor with Integrated CPU Supervisor
 
Datasheets,
Related Docs
& Simulations
DescriptionKey
Features
Parametric
Data
Application
Diagrams
 
 
Ordering Information
 iBuy direct from Intersil  iBuy direct - out of stock  Request samples
 Check distributor inventory    
Part No. Design-In
Status
Temp. Package MSL Price
US $
PB Free
X40010S8-A InActive Comm 8 Ld SOIC 1 N/A      
X40010S8-AT1 InActive Comm 8 Ld SOIC T+R 1 N/A      
X40010S8-B InActive Comm 8 Ld SOIC 1 N/A      
X40010S8-BT1 InActive Comm 8 Ld SOIC T+R 1 N/A      
X40010S8-C InActive Comm 8 Ld SOIC 1 N/A      
X40010S8-CT1 InActive Comm 8 Ld SOIC T+R 1 N/A      
X40010S8I-A InActive Ind 8 Ld SOIC 1 N/A      
X40010S8I-AT1 InActive Ind 8 Ld SOIC T+R 1 N/A      
X40010S8I-B InActive Ind 8 Ld SOIC 1 N/A      
X40010S8I-BT1 InActive Ind 8 Ld SOIC T+R 1 N/A      
X40010S8I-C InActive Ind 8 Ld SOIC 1 N/A      
X40010S8I-CT1 InActive Ind 8 Ld SOIC T+R 1 N/A      
X40010V8-A InActive Comm 8 Ld TSSOP 1 N/A      
X40010V8-AT1 InActive Comm 8 Ld TSSOP T+R 1 N/A      
X40010V8-B InActive Comm 8 Ld TSSOP 1 N/A      
X40010V8-BT1 InActive Comm 8 Ld TSSOP T+R 1 N/A      
X40010V8-C InActive Comm 8 Ld TSSOP 1 N/A      
X40010V8-CT1 InActive Comm 8 Ld TSSOP T+R 1 N/A      
X40010V8I-A InActive Ind 8 Ld TSSOP 1 N/A      
X40010V8I-AT1 InActive Ind 8 Ld TSSOP T+R 1 N/A      
X40010V8I-B InActive Ind 8 Ld TSSOP 1 N/A      
X40010V8I-BT1 InActive Ind 8 Ld TSSOP T+R 1 N/A      
X40010V8I-C InActive Ind 8 Ld TSSOP 1 N/A      
X40010V8I-CT1 InActive Ind 8 Ld TSSOP T+R 1 N/A      
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
 
  Description

The X40010/11/14/15 combines power-on reset control, watchdog timer, supply voltage supervision, and secondary voltage supervision, in one package. This combination lowers system cost, reduces board space requirements, and increases reliability.

Applying voltage to VCC activates the power on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and system oscillator to stabilize before the processor can execute code.

 
  Key Features
 
  • Dual voltage detection and reset assertion
    • Standard reset threshold settings See Selection table on page 2.
    • Adjust low voltage reset threshold voltages using special programming sequence
    • Reset signal valid to VCC = 1V
    • Monitor three voltages or detect power fail
  • Independent Core Voltage Monitor (V2MON)
  • Fault detection register
  • Selectable power on reset timeout (0.05s, 0.2s, 0.4s, 0.8s)
  • Selectable watchdog timer interval (25ms, 200ms,1.4s, off)
  • Low power CMOS
    • 25ľA typical standby current, watchdog on
    • 6ľA typical standby current, watchdog off
  • 400kHz 2-wire interface
  • 2.7V to 5.5V power supply operation
  • Available packages
    • 8-lead SOIC, TSSOP
  • Monitor Voltages: 5V to 0.9V
  • Independent Core Voltage Monitor
Related Documentation
 
Datasheet(s)   Datasheet(s):
 
  Parametric Data
# of Voltage Monitors2
VS Range (V)2.7 to 5.5
2.7 to 5.5
2.7 to 3.6
Voltage Threshold 14.6 (1%)
4.6 (1%)
2.9 (1.7%)
Voltage Threshold 22.9 (1.7%)
2.6 (2%)
1.6 (3%)
Reset Output TypeActive High
Watchdog Timer (s)OFF, 0.025, 0.2, 1.4
Manual ResetN
Bus InterfaceI2C
EEPROM Size (kbits)0
Battery Montor and SwitchoverN
Fault Detection RegisterY
Suffix-A
-B
-C
POR (ms)50, 200, 400, 800
RTC FunctionN
 
  Application Block Diagrams
 
 
 
Applications
 
  • Communication Equipment
    • Routers, Hubs, Switches
    • Disk Arrays, Network Storage
  • Industrial Systems
    • Process Control
    • Intelligent Instrumentation
  • Computer Systems
    • Computers
    • Network Servers

 

About Us | Careers | Contact Us | Investors | Legal | Privacy | Site Map | Subscribe | Intranet

©2003-2009. Intersil Americas Inc. All rights reserved.