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| 12-Bit, 125MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs |
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| Ordering Information |
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 iBuy direct from Intersil
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 iBuy direct - out of stock
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 Request samples
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 Check distributor inventory
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Available in RoHS/Pb-Free
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Part No. |
Design-In
Status |
Temp. |
Package |
MSL |
Price
US $ |
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| KAD5612P-12Q72 |
Active |
Ind |
72 Ld QFN |
3 |
32.55 |
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| The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice. |
| MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020 |
| SMD = Standard Microcircuit Drawing |
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 Description |
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The KAD5612P is a family of low-power, high-performance, dual-channel 12-bit, analog-to-digital converters. Designed with FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5612P-25 is the fastest member of this pin-compatible family, which also features sample rates of 210MSPS (KAD5612P-21), 170MSPS (KAD5612P-17) and 125MSPS (KAD5612P-12).
A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of gain, skew and offset matching between the two converter cores.
Digital output data is presented in selectable LVDS or CMOS formats. The KAD5612P is available in a 72-contact QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C). |
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 Key Features |
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Programmable Gain, Offset and Skew Control
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1.3GHz Analog Input Bandwidth
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60fs Clock Jitter
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Over-Range Indicator
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Selectable Clock Divider: ÷1, ÷2 or ÷4
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Clock Phase Selection
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Nap and Sleep Modes
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Two's Complement, Gray Code or Binary Data Format
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DDR LVDS-Compatible or LVCMOS Outputs
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Programmable Built-in Test Patterns
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Single-Supply 1.8V Operation
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Pb-Free (RoHS Compliant)
Key Specifications -
SNR = 66.0dBFS for fIN = 105MHz (-1dBFS)
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SFDR = 86.0dBc for fIN = 105MHz (-1dBFS)
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Power Consumption
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429mW @ 250MSPS
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342mW @ 125MSPS
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| Related Documentation |
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 Application Note(s): |
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 Datasheet(s): |
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 Evaluation Board(s): |
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 Technical Homepage: |
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 Design Model(s): |
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 Parametric Data |
| | Resolution (Bits) | | 12 | | | Conv. Rate (MSPS) | | 125 | | | Channels | | 2 | | | SNR (dBFS) | | 67.2 | | | SFDR (dBc) | | 80.4 | | | Power (mW) | | 342 | | | Supply Voltage (V) | | Multi (1.8 Anlg, 1.8 Dig) | | | Input BW (MHz) | | 1300 | | | Input VIN (Range) (VP-P, differential) | | 1.45 | | | INL (max) (±LSB) | | 1.6 (typ) | | | DNL (max) (±LSB) | | 0.7 (typ) | |
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 Application Block Diagrams |
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| Applications |
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- Power Amplifier Linearization
- Radar and Satellite Antenna Array Processing
- Broadband Communications
- High-Performance Data Acquisition
- Communications Test Equipment
- WiMAX and Microwave Receivers
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| | KAD5612P-17 | | 12-Bit, 170MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5612P-21 | | 12-Bit, 210MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5612P-25 | | 12-Bit, 250MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs | |
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