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| 12-Bit, 250MSPS Single-Channel ADC with LVDS/LVCMOS Outputs |
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| Ordering Information |
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 iBuy direct from Intersil
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 iBuy direct - out of stock
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 Request samples
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 Check distributor inventory
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Available in RoHS/Pb-Free
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Part No. |
Design-In
Status |
Temp. |
Package |
MSL |
Price
US $ |
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| KAD5512P-25Q48 |
Active |
Ind |
48 Ld QFN |
3 |
45.00 |
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| KAD5512P-25Q72 |
Active |
Ind |
72 Ld QFN |
3 |
45.00 |
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| The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice. |
| MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020 |
| SMD = Standard Microcircuit Drawing |
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 Description |
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The KAD5512P is the low-power member of the KAD5512 family of 12-bit analog-to-digital converters. Designed with Intersil's proprietary FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5512P is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS.
A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of various parameters such as gain and offset.
Digital output data is presented in selectable LVDS or CMOS formats. The KAD5512P is available in 72- and 48-contact QFN packages with an exposed paddle. Operating from a 1.8V supply, performance is specified over the full industrial temperature range (-40°C to +85°C). |
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 Key Features |
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Pin-Compatible with the KAD5512HP Family, Operating at Half the Power
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Programmable Gain, Offset and Skew Control
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1.3GHz Analog Input Bandwidth
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60fs Clock Jitter
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Over-Range Indicator
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Selectable Clock Divider: ÷1, ÷2 or ÷4
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Clock Phase Selection
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Nap and Sleep Modes
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Two's Complement, Gray Code or Binary Data Format
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SDR/DDR LVDS-Compatible or LVCMOS Outputs
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Programmable Built-in Test Patterns
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Single-Supply 1.8V Operation
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Pb-Free (RoHS Compliant)
Key Specifications -
SNR = 66.1dBFS for fIN = 105MHz (-1dBFS)
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SFDR = 87dBc for fIN = 105MHz (-1dBFS)
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Total Power Consumption
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267/219mW @ 250/125MSPS (SDR Mode)
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234/189mW @ 250/125MSPS (DDR Mode)
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| Related Documentation |
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 Application Note(s): |
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 Datasheet(s): |
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 Evaluation Board(s): |
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 Technical Homepage: |
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 Design Model(s): |
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 Parametric Data |
| | Resolution (Bits) | | 12 | | | Conv. Rate (MSPS) | | 250 | | | Channels | | 1 | | | SNR (dBFS) | | 66.1 | | | SFDR (dBc) | | 83 | | | Power (mW) | | 234 | | | Supply Voltage (V) | | Multi (1.8 Anlg, 1.8 Dig) | | | Input BW (MHz) | | 1300 | | | Input VIN (Range) (VP-P, differential) | | 1.45 | | | INL (max) (±LSB) | | 1.5 (typ) | | | DNL (max) (±LSB) | | 0.7 (typ) | |
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 Application Block Diagrams |
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| Applications |
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- Power Amplifier Linearization
- Radar and Satellite Antenna Array Processing
- Broadband Communications
- High-Performance Data Acquisition
- Communications Test Equipment
- WiMAX and Microwave Receivers
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| | KAD5512HP-12 | | 12-Bit, 125MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512HP-17 | | 12-Bit, 170MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512HP-21 | | 12-Bit, 210MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512HP-25 | | 12-Bit, 250MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512P-12 | | 12-Bit, 125MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512P-17 | | 12-Bit, 170MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512P-21 | | 12-Bit, 210MSPS Single-Channel ADC with LVDS/LVCMOS Outputs | | | KAD5512P-50 | | 12-Bit, 500MSPS Single-Channel ADC, with LVDS/LVCMOS Outputs | |
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