ISL6548 ACPI Regulator/Controller for Dual Channel DDR Memory Systems

ISL6548

ACPI Regulator/Controller for Dual Channel DDR Memory Systems

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	Technical Documentation		Tools And Support
	Pricing / Samples		Related Devices

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	ISL6548CRZA	Details
	ISL6548CRZA-T	Details

Datasheet
	ISL6548
	ACPI Regulator/Controller for Dual Channel DDR Memory Systems

V_IN (min) (V)

4.5

V_IN (max) (V)

5.5

V_OUT1 (min) (V)

V_OUT1 (max) (V)

V_IN

V_OUT2 (V)

50% of V_OUT1

V_OUT3 (V)

Adjustable down to 0.8V

V_OUT4 (V)

Adjustable down to 0.8V

I_OUT1 (A)

Product Information

Key Features

Generates 4 Regulated Voltages
- Synchronous Buck PWM Controller for DDR V_DDQ
- 3A Integrated Sink/Source Linear Regulator with Accurate V_DDQ/2 Divider Reference for DDR V_TT
- LDO Regulator for GMCH Core
- Sink/Source LDO Regulator for CPU/GMCH V_TT Termination
ACPI Compliant Sleep State Control
Glitch-free Transitions During State Changes
PWM Controller Drives Low Cost N-Channel MOSFETs
250kHz Constant Frequency Operation
Tight Output Voltage Regulation
- All Outputs: ±2% Over Temperature
Fully-Adjustable Outputs with Wide Voltage Range: Down to 0.8V supports DDR and DDR2 Specifications
Simple Single-Loop Voltage-Mode PWM Control Design
Fast PWM Converter Transient Response
Under and Overvoltage Monitoring on All Outputs
OCP on the Switching Regulator
Integrated Thermal Shutdown Protection
Pb-Free Plus Anneal Available (RoHS Compliant)

Description

The ISL6548 provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply V_DDQ during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (V_DDQ/2) high current V_TT voltage without the need for a negative supply. Two LDO controllers are also integrated for the GMCH core voltage regulation and for the GMCH/CPU V_TT termination voltage regulation.

The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectified buck converter topology. The synchronous buck converter uses voltagemode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0.8V.

An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH/CPU V_TT termination voltage is within spec and operational.

Each output is monitored for undervoltage events. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated.

Pricing / Packaging / Samples / Ordering

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Check distributor inventory	Available in RoHS/Pb-Free

	Part No.	Design-In Status	Temp.	Package	MSL	Price US $

	ISL6548CRZA	Active	Comm	28 Ld QFN	3	3.17

	ISL6548CRZA-T	Active	Comm	28 Ld QFN T+R	3	3.17

	ISL6548CRZ	InActive	Comm	28 Ld QFN	3	N/A

	ISL6548CRZ-T	InActive	Comm	28 Ld QFN T+R	3	N/A

The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing

Technical Documentation

Application Note(s):
Embedded ACPI Compliant DDR Power Generation Using the ISL6548 and ISL6506
Datasheet(s):
ACPI Regulator/Controller for Dual Channel DDR Memory Systems

Tools And Support
iSim Design Simulation
No Models Available

Application Block Diagrams

Applications

Single and Dual Channel DDR Memory Power Systems in ACPI compliant PCs
Graphics Cards - GPU and Memory Supplies
ASIC Power Supplies
Embedded Processor and I/O Supplies
DSP Supplies

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