Device Information
 
 
ISL6412 Printer Friendly Version
 
Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit
 
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Ordering Information
 iBuy direct from Intersil  iBuy direct - out of stock  Request samples
 Check distributor inventory Green/Pb(Lead free) Device  Available in RoHS/Pb-Free  
Part No. Design-In
Status
Temp. Package MSL Price
US $
PB Free
ISL6412IRZ Active Ind 16 Ld QFN 3 1.29 PB Free Out of stock Disti-Buy Sample
ISL6412IRZ-TK Active Ind 16 Ld QFN T+R 3 1.29 PB Free Disti-Buy  
ISL6412IR InActive Ind 16 Ld QFN 1 N/A      
ISL6412IR-T InActive Ind 16 Ld QFN T+R   N/A      
ISL6412IR-T5K InActive Ind 16 Ld QFN T+R 1 N/A      
ISL6412IR-TK InActive Ind 16 Ld QFN T+R 1 N/A      
ISL6412IRZ-T InActive Ind 16 Ld QFN T+R 3 N/A PB Free    
ISL6412IRZ-T5K InActive Ind 16 Ld QFN T+R 3 N/A PB Free    
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
 
  Description

The ISL6412 is an ultra low noise triple output LDO regulator with microprocessor reset circuit and is optimized for powering wireless chip sets. The IC accepts an input voltage range of 3.0V to 3.6V and provides three regulated output voltages: 1.8V (LDO1), 2.8V (LDO2), and another ultra-clean 2.8V (LDO3). On chip logic provides sequencing between LDO1 and LDO2 for the BBP/MAC and the I/O supply voltage outputs. LDO3 features ultra low noise that does not typically exceed 30μV RMS to aid VCO stability. High integration and the thin Quad Flat No-lead (QFN) package makes the ISL6412 an ideal choice to power many of today's small form factor industry standard wireless cards such as PCMCIA, mini-PCI and Cardbus-32.

The ISL6412 uses an internal PMOS transistor as the pass device. The ISL6412 also integrates a reset function, which eliminates the need for the additional reset IC required in WLAN applications. The IC asserts a RESET signal whenever the VIN supply voltage drops below a preset threshold, keeping it asserted for a time set by a capacitor to GND after VIN has risen above the reset threshold. FAULT1 indicates the loss of regulation on LDO1.

 
  Key Features
 
  • Small DC/DC Converter Size
    • Three LDOs and Reset Circuitry in a Low-Profile 4x4mm QFN Package
  • High Output Current
    • LDO1, 1.8V 330mA
    • LDO2, 2.8V 225mA
    • LDO3, 2.8V 125mA
  • Ultra-Low Dropout Voltage
    • LDO2, 2.8V 125mV (typ.) at 225mA
    • LDO3, 2.8V 100mV (typ.) at 125mA
  • Ultra-Low Output Voltage Noise
    • <30μVRMS (typ.) for LDO3 (VCO Supply)
  • Stable with Small Ceramic Output Capacitors
  • Extensive Protection and Monitoring Features
    • Over current protection
    • Short circuit protection
    • Thermal shutdown
    • FAULT indicator
  • Logic-Controlled Shutdown Pin
  • Integrated Microprocessor Reset Circuit
    • Programmable Reset Delay
  • Proven Reference Design for a Total WLAN System Solution
  • QFN Package
    • Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Product Outline
    • Near Chip-Scale Package Footprint Improves PCB Efficiency and Is Thinner in Profile
  • Pb-Free Plus Anneal Available (RoHS Compliant)
Related Documentation
 
Datasheet(s)   Datasheet(s):
 
Technical Homepage   Technical Homepage:
 
  Parametric Data
VIN (min) (V)3
VIN (max) (V)3.6
VOUT (min) (V)1.8
VOUT (max) (V)2.8
IOUT (max) (mA)840
 
  Application Block Diagrams
 
 
 
Applications
 
  • PRISM® 3 Chipsets – ISL37106P
  • WLAN Cards
    • PCMCIA, Cardbus32, MiniPCI Cards
    • Compact Flash Cards
  • Liberty Chipset
 
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