The ISL6323A dual PWM controller delivers high efficiency and tight regulation from two synchronous buck DC/DC converters. The ISL6323A supports hybrid power control of AMD processors which operate from either a 6-bit parallel VID interface (PVI) or a serial VID interface (SVI). The dual output ISL6323A features a multi-phase controller to support uniplane VDD core voltage and a single phase controller to power the Northbridge (VDDNB) in SVI mode. Only the multi-phase controller is active in PVI mode to support uniplane VDD only processors.

A precision uniplane core voltage regulation system is provided by a two-to-four-phase PWM voltage regulator (VR) controller. The integration of two power MOSFET drivers, adding flexibility in layout, reduce the number of external components in the multi-phase section. A single phase PWM controller with integrated driver provides a second precision voltage regulation system for the North Bridge portion of the processor. This monolithic, dual controller with integrated driver solution provides a cost and space saving power management solution.

For applications which benefit from load line programming to reduce bulk output capacitors, the ISL6323A features output voltage droop. The multi-phase portion also includes advanced control loop features for optimal transient response to load apply and removal. One of these features is highly accurate, fully differential, continuous DCR current sensing for load line programming and channel current balance. Dual edge modulation is another unique feature, allowing for quicker initial response to high di/dt load transients.

The ISL6323A supports Power Savings Mode by dropping the number of phases to one when the PSI_L bit is set.

• Processor Core Voltage Via Integrated Multi-Phase Power Conversion
• Configuration Flexibility
  • 2-Phase Operation with Internal Drivers
  • 3- or 4-Phase Operation with External PWM Drivers
• PSI_L Support with Phase Shedding for Improved Efficiency at Light Load
• Serial VID Interface Inputs
  • Two Wire, Clock and Data, Bus
  • Conforms to AMD SVI Specifications
• Parallel VID Interface Inputs
  • 6-bit VID input
  • 0.775V to 1.55V in 25mV Steps
  • 0.375V to 0.7625V in 12.5mV Steps
• Precision Core Voltage Regulation
  • Differential Remote Voltage Sensing
  • ±0.6% System Accuracy Over-Temperature
  • Adjustable Reference-Voltage Offset
• Optimal Processor Core Voltage Transient Response
  • Adaptive Phase Alignment (APA)
  • Active Pulse Positioning Modulation
• Fully Differential, Continuous DCR Current Sensing
  • Accurate Load Line Programming
  • Precision Channel Current Balancing
• Variable Gate Drive Bias: 5V to 12V
• Overcurrent Protection
• Multi-tiered Overvoltage Protection
• Selectable Switching Frequency up to 1MHz
• Simultaneous Digital Soft-Start of Both Outputs
• Processor NorthBridge Voltage Via Single Phase Power Conversion
• Precision Voltage Regulation
  • Differential Remote Voltage Sensing
  • ±0.6% System Accuracy Over Temperature
• Serial VID Interface Inputs
  • Two Wire, Clock and Data, Bus
  • Conforms to AMD SVI Specifications
• Overcurrent Protection
• Continuous DCR Current Sensing
• Variable Gate Drive Bias: 5V to 12V
• Simultaneous Digital Soft-Start of Both Outputs
• Selectable Switching Frequency up to 1MHz
• Pb-Free Plus Anneal Available (RoHS Compliant)