The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD/VID = Standard Microcircuit Drawing/Vendor Item Drawing
CD4020BMS, CD4024BMS, and CD4040BMS are ripplecarry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.
The CD4020BMS, CD4024BMS and the CD4040BMS is supplied in these 14 lead outline packages:
CD4020B CD4024B CD4040B Braze Seal DIP H4W H4Q H4X Frit Seal DIP H1F H1B H1F Ceramic Flatpack H6W H3W H6W
Key Features
High Voltage Types (20V Rating)
Medium Speed Operation
Fully Static Operation
Buffered Inputs and Outputs
100% Tested for Quiescent Current at 20V
Standardized Symmetrical Output Characteristics
Common Reset
5V, 10V and 15V Parametric Ratings
Maximum Input Current of 1ľa at 18V Over Full Package- Temperature Range;
100nA at 18V and 25oC
Noise Margin (Over Full Package Temperature Range):
1V at VDD = 5V
2V at VDD = 10V
2.5V at VDD = 15V
Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications For Description Of 'B' Series CMOS Devices"
SMD Datasheet(s):
Technical Homepage: