The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD/VID = Standard Microcircuit Drawing/Vendor Item Drawing
Description
CD40106BMS consists of six Schmitt trigger circuits. Each circuit functions as an inverter with Schmitt trigger action on the input. The trigger switches at different points for positive and negative going signals. The difference between the positive going voltage (VP) and the negative going voltage (VN) is defined as hysteresis voltage (VH) (see Figure 17). The CD40106BMS is supplied in these 14 lead outline packages:
Braze Seal DIP H4Q Frit Seal DIP H1B Ceramic Flatpack H3W
Key Features
High Voltage Type (20V Rating)
Schmitt Trigger Action with No External Components
Hysteresis Voltage (Typ.)
0.9V at VDD = 5V
2.3V at VDD = 10V
3.5V at VDD = 15V
Noise Immunity Greater than 50%
No Limit on Input Rise and Fall Times
Low VDD to VSS Current During Slow Input Ramp
100% Tested for Quiescent Current at 20V
5V, 10V and 15V Parametric Ratings
Maximum Input Current of 1ľA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
Standardized Symmetrical Output Characteristics
Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"