Single Event Upset (SEU) Immunity <1 x 10-10 Errors/Bit-Day (Typ)
SEU LET Threshold >80 MEV-cm2/mg
Dose Rate Upset >1011 RAD (Si)/s, 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55oC to +125oC
Significant Power Reduction Compared to ALSTTL Logic
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
VIL = 30% of VCC Max
VIH = 70% of VCC Min
Input Current ≤1ľA at VOL, VOH
Description
The Intersil ACS374MS is a radiation hardened octal D-type flip- flop with three-state outputs. The eight edge-triggered flip-flops enter data into their registers on the low to high transition of clock (CP). The Output Enable (OEN) controls the three-state outputs and is independent of the register operation. When the OEN is high, the outputs will be in the high impedance state.
The ACS374MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS Logic Family.
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD/VID = Standard Microcircuit Drawing/Vendor Item Drawing