CMOS Hex Inverter

Typical Diagram

enlarge +typical diagram

Key Features

    • High Voltage Types (20V Rating)
    • Standardized Symmetrical Output Characteristics
    • Medium Speed Operation: tPHL, tPLH = 30ns (typ) at 10V
    • 100% Tested for Quiescent Current at 20V
    • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
    • Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"


CD4069UBMS types consist of six CMOS inverter circuits. These devices are intended for all general-purpose inverter applications where the medium-power TTL-drive and logiclevel conversion capabilities of circuits such as the CD4009 and CD4049 Hex Inverter/Buffers are not required.

The CD4069UBMS is supplied in these 14 lead outline packages:

Braze Seal DIP H4H
Frit Seal DIP H1B
Ceramic Flatpack H3W


    • Logic Inversion
    • Pulse Shaping
    • Oscillators
    • High-Input-Impedance Amplifiers


Design Tip

Are the Schottky clamp diodes required on the outputs when not driving MOSFETs?

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Is there somewhere I can find out what simulations and models (e.g. Spice, PSpice, IBIS) are available on your website?

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iSIM Simulator

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