- 3 Micron Radiation Hardened SOS CMOS
- Total Dose 200K RAD (Si)
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ)
- Dose Rate Survivability: >1 x 1012 RAD (Si)/s
- Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
- Latch-Up Free Under Any Conditions
- Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
- Military Temperature Range: -55oC to +125oC
- Significant Power Reduction Compared to LSTTL ICs
- DC Operating Voltage Range: 4.5V to 5.5V
- LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input Current Levels Ii ≤ 5µA at VOL, VOH
The Intersil HCTS374MS is a Radiation Hardened non-inverting octal D-type, positive edge triggered flip-flop with three-stateable outputs. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). Data is also transferred to the outputs during this transition. The output enable (OE) controls the three-state outputs and is independent of the register operation. When the output enable is high, the outputs are in the high impedance state.
The HCTS374MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS374MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
|AN9867: End of Life Derating: A Necessity or Over Kill|
End of Life Derating: A Necessity or Over Kill
13 Nov 2014
|13 Nov 2014||35 KB|
Radiation Hardened Octal D-Type Flip-Flop, Tri-State, Positive Edge Triggered
14 Nov 2014
|14 Nov 2014||147 KB|
Standard Microcircuit Drawings
|SMD 5962-95748 (HCTS374MS)|
HCTS374MS electrically screened to Standard Microcircuit Drawing (SMD) 5962-95748.
|Intersil Commercial Lab Services|
Intersil Commercial Lab Services
18 Nov 2014
|18 Nov 2014||364 KB|