*EL8102/3, EL8202/3, EL8302 and EL8402 Macromodel *Version 4, Nov. 2009 by Jian Wang *Copyright 2009 by Intersil Corporation *Refer to data sheet "LICENSE STATEMENT" Use of *this model indicates your acceptance with the *terms and provisions in the License Statement. *The AC response, Transient Response, SR, Open loop gain, voltage noise are modeled. *Updated information, add Current noise, Input Common mode Capacitance 0.8pf. *Input differential mode capacitance 1.1pf. * connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt EL8102 3 2 7 4 6 R_R17 4 19 100k R_R3 4 12 1000 V_V6 18 VV3 0.7Vdc R_R8 18 0 1G R_R19 0 21 1G G_G8 7 6 7 VV5 -0.01 R_R25 0 NI1 0.0003 R_R4 4 13 1000 M_M1 12 8 9 9 pmosisil + L=50u + W=50u D_DN1 102 101 DN C_C2 4 VV3 6p I_I2 7 10 DC 1mA M_M2 13 2 11 11 pmosisil + L=50u + W=50u C_Cin2 2 0 0.8p R_R5 4 VV3 5Meg R_R16 6 7 100 D_D3 4 17 DX C_C1 VV3 7 6p R_R21 0 101 120k G_G9 21 4 6 VV5 0.00025 R_R14 VV5 20 100k D_D7 7 21 DX V_V5 VV3 17 0.7Vdc R_R7 17 0 1G R_R1 9 10 10 G_G10 22 4 VV5 6 0.00025 R_R11 VV4 7 100k E_E1 16 4 7 4 0.5 R_R15 4 6 100 R_R23 0 NI2 0.0002 R_R20 22 0 1G R_R10 4 VV4 100k R_R2 10 11 10 R_R6 VV3 7 5Meg D_DN2 104 103 DN G_G4 7 VV4 VV3 16 0.00001 I_Ib1 0 3 DC 5.95uAdc G_G6 7 VV5 VV4 16 0.00001 D_D8 7 22 DX I_Ib2 0 2 DC 6.05uAdc L_L1 20 7 80uH R_R22 0 103 120k G_G3 4 VV4 VV3 16 0.00001 G_G7 6 4 VV5 4 -0.01 G_Gn1 3 0 NI1 0 1 E_EN 8 3 101 103 1 G_G5 4 VV5 VV4 16 0.00001 D_D5 4 21 DY I_I1 7 4 DC 4mA G_G1 4 VV3 13 12 0.004 L_L2 4 19 80uH R_R13 19 VV5 100k D_D6 4 22 DY R_R26 0 NI1 0.0003 V_V16 104 0 1Vdc G_G2 7 VV3 13 12 0.004 G_Gn2 2 0 NI2 0 1 R_R18 20 7 100k V_V15 102 0 1Vdc C_C4 VV4 7 0.005p C_C3 4 VV4 0.005p R_R24 0 NI2 0.0002 D_D4 18 7 DX C_Cin1 8 0 0.8p C_Cdiff 8 2 1.1p .model pmosisil pmos (kp=4e-3 vto=10m) .MODEL DY D(IS=1E-25 BV=50 Rs=1) .MODEL DX D(IS=1E-15 Rs=0.1) .model DN D(KF=6.4E-16 AF=1) .ends EL8102