Applications

Datasheet

CD40174BMS
CMOS Hex D-Type Flip-Flop

Typical Diagram

enlarge +typical diagram

Key Features

    • High Voltage Type (20V Rating)
    • 5V, 10V and 15V Parametric Ratings
    • Standardized, Symmetrical Output Characteristics
    • 100% Tested for Quiescent Current at 20V
    • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC
    • Noise Margin (Over full Package Temperature Range):
      • 1V at VDD = 5V
      • 2V at VDD = 10V
      • 2.5V at VDD = 15V
    • Meets All Requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"

Description

CD40174BMS consists of six identical 'D'-Type flip-flops having independent DATA inputs. The CLOCK and CLEAR inputs are common to all six units. Data is transferred to the Q outputs on the positive going transition of the clock pulse. All six flip-flops are simultaneously reset by a low level on the CLEAR input.

The CD40174BMS is supplied in these 16 lead outline packages:

Braze Seal DIP H4T
Frit Seal DIP H1E
Ceramic Flatpack H6W

Applications

    • Shift Registers
    • Buffer/Storage Registers
    • Pattern Generators

Alternatives

Design Tip

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