HCS193MS
Rad-Hard Synchronous 4-Bit Up/Down Counter
Typical Diagram

Key Features
- 3 Micron Radiation Hardened CMOS SOS
- Total Dose 200K RAD (Si)
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ)
- Dose Rate Survivability: >1 x 1012 RAD (Si)/s
- Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
- Latch-Up Free Under Any Conditions
- Military Temperature Range: -55oC to +125oC
- Significant Power Reduction Compared to LSTTL ICs
- DC Operating Voltage Range: 4.5V to 5.5V
- Input Logic Levels
- VIL = 0.30% VCC Max
- VIH = 0.70% VCC Min
- Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCS193MS is a Radiation Hardened 4-bit binary UP/ DOWN synchronous counter.
Presetting the counter to the number on the preset data inputs (P0 - P3) is accomplished by a low on the asynchronous parallel load input (PL). The counter is incremented on the low to high transition of the clock-up input (high on the clock-down), decremented on the low to high transition of the clock-down input (high on the clock-up). A high level on the MR input overrides any other input to clear the counter to zero. The Terminal Count Up goes low half a clock period before the zero count is reached and returns high at the maximum count.
The HCS193MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.

