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Datasheet

HCTS540MS
CMOS Inverting Octal Buffer/Line Driver, Three-State

Typical Diagram

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Key Features

    • 3 Micron Radiation Hardened CMOS SOS
    • Total Dose 200K RAD (Si)
    • SEP Effective LET No Upsets: >100 MEV-cm2/mg
    • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ)
    • Dose Rate Survivability: >1 x 1012 RAD (Si)/s
    • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
    • Latch-Up Free Under Any Conditions
    • Fanout (Over Temperature Range)
      • Bus Driver Outputs 15 LSTTL Loads
    • Military Temperature Range: -55oC to +125oC
    • Significant Power Reduction Compared to LSTTL ICs
    • DC Operating Voltage Range: 4.5V to 5.5V
    • LSTTL Input Compatibility
      • VIL = 0.8V Max
      • VIH = VCC/2 Min
    • Input Current Levels Ii ≤ 5µA at VOL, VOH

Description

The Intersil HCTS540MS is a Radiation Hardened inverting Octal Buffer/Line Driver, with two active-low output enables. The output enable pins (OE1 and OE2) control the threestate outputs. If either enable is high the outputs will be the high impedance state. For data output both enables (OE1 and OE2) must be low.

The HCTS540MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCTS540MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).

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Design Tip

Are the Schottky clamp diodes required on the outputs when not driving MOSFETs?

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