Applications

Datasheet

X55060
Dual Voltage Monitor with Integrated System Battery Switch and EEPROM

Typical Diagram

Diagram Not Shown

Key Features

    • Dual voltage monitoring
    • Active high and active low reset outputs
    • Four standard reset threshold voltages (4.6/2.9, 4.6/2.6, 2.9/1.6, 2.6/1.6)
      • User programmable thresholds
    • Lowline Output - Zero delayed POR
    • Reset signal valid to VCC = 1V
    • System battery switch-over circuitry
    • Long battery life with low power consumption
      • <50µA max standby current, watchdog on
      • <30µA max standby current, watchdog off
    • Selectable watchdog timer
      • (0.15s, 0.4s, 0.8s, off)
    • 64Kbits of EEPROM
    • Built-in inadvertent write protection
      • Power-up/power-down protection circuitry
      • Protect none(0), or all of EEPROM array with programmable Block Lock™ protection
      • In circuit programmable ROM mode
    • Minimize EEPROM programming time
      • 64 byte page write mode
      • Self-timed write cycle
      • 5ms write cycle time (typical)
    • 10MHz SPI interface modes (0,0 & 1,1)
    • 2.7V to 5.5V power supply operation
    • Available packages - 20-lead TSSOP

Description

This device combines power-on reset control, battery switch circuit, watchdog timer, supply voltage supervision, secondary voltage supervision, block lock protect and serial EEPROM in one package. This combination lowers system cost, reduces board space requirements, and increases reliability.

Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can execute code.

A system battery switch circuit compares VCC (V1MON) with VBATT input and connects VOUT to whichever is higher. This provides voltage to external SRAM or other circuits in the event of main power failure. The X55060 can drive 50mA from VCC and 250µA from VBATT. The device switches to VBATT when VCC drops below the low VCC voltage threshold and VBATT > VCC.

The Watchdog Timer provides an independent protection mechanism for microcontrollers. When the microcontroller fails to restart a timer within a selectable time out interval, the device activates the WDO signal. The user selects the interval from three preset values. Once selected, the interval does not change, even after cycling the power.

The device's low VCC detection circuitry protects the user's system from low voltage conditions, resetting the system when VCC (V1MON) falls below the minimum VCC trip point (VTRIP1). RESET/RESET is asserted until VCC returns to proper operating level and stabilizes. A second voltage monitor circuit tracks the unregulated supply or monitors a second power supply voltage to provide a power fail warning. Intersil's unique circuits allow the threshold for either voltage monitor to be reprogrammed to meet special needs or to fine-tune the threshold for applications requiring higher precision.

Alternatives

Design Tip

What are the MOSFET Driver Dynamics and Current Sense Methods that one needs to be concerned about in PWM Converters?

See More »

Is there somewhere I can find out what simulations and models (e.g. Spice, PSpice, IBIS) are available on your website?

See More »

iSIM Simulator

Select a category to start designing:

Enter design requirements:

Enter design requirements:

Desired Closed Loop Gain:
Desired Min. Bandwidth:

Support | Ask An Expert

Need tech support for a product or design?
(Support FAQs)

Ask »

Follow Us Intersil Wins Outstanding Achievement in Web Development

Find pricing and availability for your part number. Order Parts, Eval Boards and Samples

Contact Sales »

myINTERSIL

Sign in to your account…
Search Orders    
Please Wait...

Toolbar

Simply Smarter