X4C105
CPU Supervisor with NOVRAM and Output Ports
Typical Diagram
Key Features
- 4Kbit serial EEPROM
- 400kHz serial interface speed
- 16-byte page write mode
- One nibble NOVRAM
- 120ns NOVRAM access speed
- AUTOSTORE
- Direct/bus access of NOVRAM bits
- Four output ports
- Operates at 3.3V ± 10%
- Low voltage reset when VCC < 3V
- 3% accurate thresholds available
- Output signal shows low voltage condition
- Activates NOVRAM AUTOSTORE
- Internal block on EEPROM operation
- Max EEPROM/NOVRAM nonvolatile write cycle: 5ms
- High reliability
- 1,000,000 endurance cycles
- Guaranteed data retention: 100 years
- 20-lead TSSOP and 20 Ld PDIP packages
Description
The low voltage X4C105 combines several functions into one device. The first is a 2-wire, 4Kbit serial EEPROM memory with write protection. A Write Protect (WP) pin provides hardware protection for the upper half of this memory against inadvertent writes.
A one nibble NOVRAM is provided and occupies a single location. This allows access of 4-bits in a single 150ns cycle. This is useful for tracking system operation or process status. The NOVRAM memory is completely isolated from the serial memory section.
A low voltage detect circuit activates a RESET pin when VCC drops below 3V. This signal also blocks new read or write operations and initiates a NOVRAM AUTOSTORE. The AUTOSTORE operation is powered by an external capacitor to ensure that the value in the NOVRAM is always maintained in the event of a power failure.
The four NOVRAM bits also appear on four separate output pins to allow continuous control of external circuitry, such as ASICs.
Intersil EEPROMs are designed and tested for applications requiring extended endurance. Inherent data retention is greater than 100 years.
