KAD5612P-25
12-Bit, 250MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs
Key Features
- Programmable Gain, Offset and Skew Control
- 1.3GHz Analog Input Bandwidth
- 60fs Clock Jitter
- Over-Range Indicator
- Selectable Clock Divider: ÷1, ÷2 or ÷4
- Clock Phase Selection
- Nap and Sleep Modes
- Two's Complement, Gray Code or Binary Data Format
- DDR LVDS-Compatible or LVCMOS Outputs
- Programmable Built-in Test Patterns
- Single-Supply 1.8V Operation
- Pb-Free (RoHS Compliant)
Key Specifications - SNR = 66.0dBFS for fIN = 105MHz (-1dBFS)
- SFDR = 86.0dBc for fIN = 105MHz (-1dBFS)
- Power Consumption
- 429mW @ 250MSPS
- 342mW @ 125MSPS
Description
The KAD5612P is a family of low-power, high-performance, dual-channel 12-bit, analog-to-digital converters. Designed with FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5612P-25 is the fastest member of this pin-compatible family, which also features sample rates of 210MSPS (KAD5612P-21), 170MSPS (KAD5612P-17) and 125MSPS (KAD5612P-12).
A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of gain, skew and offset matching between the two converter cores.
Digital output data is presented in selectable LVDS or CMOS formats. The KAD5612P is available in a 72-contact QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C).
Applications
- Power Amplifier Linearization
- Radar and Satellite Antenna Array Processing
- Broadband Communications
- High-Performance Data Acquisition
- Communications Test Equipment
- WiMAX and Microwave Receivers
