Applications

Datasheet

ISLA212P50
12-Bit, 500MSPS ADC

Typical Diagram

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Key Features

    • Automatic Fine Interleave Correction Calibration
    • Single Supply 1.8V Operation
    • Clock Duty Cycle Stabilizer
    • 75fs Clock Jitter
    • 700MHz Bandwidth
    • Programmable Built-in Test Patterns
    • Multi-ADC Support
      • SPI Programmable Fine Gain and Offset Control
      • Support for Multiple ADC Synchronization
      • Optimized Output Timing
    • Nap and Sleep Modes
      • 200µs Sleep Wake-up Time
    • Data Output Clock
    • DDR LVDS-Compatible or LVCMOS Outputs
    • User-accessible Digital Temperature Monitor

Description

The ISLA212P50 is a 12-bit, 500MSPS analog-to-digital converter designed with Intersil's proprietary FemtoCharge™ technology on a standard CMOS process. The ISLA212P50 is part of a pin-compatible portfolio of 12 to 16-bit A/Ds with maximum sample rates ranging from 130MSPS to 500MSPS. The device utilizes two time-interleaved 250MSPS unit ADCs to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. The proprietary Intersil Interleave Engine (I2E) performs automatic correction of offset, gain, and sample time mismatches between the unit ADCs to optimize performance.

A serial peripheral interface (SPI) port allows for extensive configurability of the A/D. The SPI also controls the interleave correction circuitry, allowing the system to issue offline and continuous calibration commands as well as configure many dynamic parameters.

Digital output data is presented in selectable LVDS or CMOS formats. The ISLA212P50 is available in a 72 Ld QFN package with an exposed paddle. Operating from a 1.8V supply, performance is specified over the full industrial temperature range (-40°C to +85°C).

Applications

    • Radar Array Processing
    • Software Defined Radios
    • Broadband Communications
    • High-Performance Data Acquisition
    • Communications Test Equipment

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