Device Information
 
 
HSP50216 Print Page
 
Four-Channel Programmable Digital DownConverter
 
Ordering Information
Green/Pb(Lead free) Device  Available in RoHS/Pb-Free
 Buy direct from Intersil  Check distributor inventory  Request samples
Part No. Design-In
Status
Temp. Package MSL Price
US $
PB Free
HSP50216KI Active Ind 196 Ld BGA 3 59.29   Buy  
HSP50216KIZ Active Ind 196 Ld BGA 3 59.29 PB Free Buy  
HSP50216EVAL1 InActive   Eval Board N/A Contact Us      
HSP50216VI InActive Ind 196 Ld BGA 3 Contact Us      
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
 
  Description

The HSP50216 Quad Programmable Digital Downconverter (QPDC) is designed for high dynamic range applications such as cellular basestations where multiple channel processing is required in a small physical space. The QPDC combines into a single package, a set of four channels which include: digital mixers, a quadrature carrier NCO, digital filters, a resampling filter, a Cartesian-to-polar coordinate converter and an AGC loop.

The HSP50216 accepts four channels of 16-bit real digitized IF samples which are mixed with local quadrature sinusoids. Each channel carrier NCO frequency is set independently by the microprocessor. The output of the mixers are filtered with a CIC and FIR filters, with a variety of decimation options. Gain adjustment is provided on the filtered signal. The digital AGC provides a gain adjust range of up to 96dB with programmable thresholds and slew rates. A cartesian to polar coordinate converter provides magnitude and phase outputs. A frequency discriminator provides a frequency output via the FIR filter. Selectable outputs include I samples, Q samples, Magnitude, Phase, Frequency and AGC gain. The output resolution is selectable from 4-bit fixed point to 32-bit floating point.

The maximum output bandwidth achievable using a single channel is at least 1MHz.

 
  Key Features
 
  • Up to 70MSPS Input
  • Four Independently Programmable Downconverter Channels in a single package
  • Four Parallel 16-Bit Inputs - Fixed or Floating Point Format
  • 32-Bit Programmable Carrier NCO with >115dB SFDR
  • 110dB FIR Out of Band Attenuation
  • Decimation from 8 to >65536
  • 24-bit Internal Data Path
  • Digital AGC with up to 96dB of Gain Range
  • Filter Functions
    • 1 to 5 Stage CIC Filter
    • Halfband Decimation and Interpolation FIR Filter
    • Programmable FIR Filter
    • Resampling FIR Filter
  • Cascadable Filtering for Additional Bandwidth
  • Four Independent Serial Outputs
  • 3.3V Operation
  • Pb-Free Available (RoHS Compliant)
Related Documentation
 
Application Note(s)   Application Note(s):
 
Datasheet(s)   Datasheet(s):
 
Evaluation Board(s)   Evaluation Board(s):
 
Technical Homepage   Technical Homepage:
 
 
  Parametric Data
Clock (MHz)70
Data (Bits)16
Decimation Factors4 to >16k
FilteringCIC HB Programmable FIR Re-Sampler
 
 
Applications
 
  • Narrow-Band TDMA through IS-95 CDMA Digital Software Radio and Basestation Receivers
  • Wide-Band Applications: W-CDMA and UMTS Digital Software Radio and Basestation Receivers
 
  Related DevicesParametric Table   Parametric Table
 
 HSP50016 Digital Down Converter 
 HSP50210 Digital Costas Loop 
 HSP50214B Programmable Downconverter 
 ISL5216 Four-Channel Programmable Digital DownConverter 
 ISL5416 Four-Channel Wideband Programmable DownConverter 

 

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