Device Information
 
 
HSP50214B Print Page
 
Programmable Downconverter
 
Ordering Information
Green/Pb(Lead free) Device  Available in RoHS/Pb-Free
 Buy direct from Intersil  Check distributor inventory  Request samples
Part No. Design-In
Status
Temp. Package MSL Price
US $
PB Free
HSP50214BVC Active Comm 120 Ld MQFP 4 58.24   Buy  
HSP50214BVCZ Active Comm 120 Ld MQFP 3 58.24 PB Free Buy  
HSP50214BVI Active Ind 120 Ld MQFP 4 73.49   Buy  
HSP50214BVIZ Active Ind 120 Ld MQFP 3 73.49 PB Free Buy  
The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
 
  Description

The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter (PDC) performs down conversion, decimation, narrowband low pass filtering, gain scaling, resampling, and Cartesian to Polar coordinate conversion.

The 14-bit sampled IF input is down converted to baseband by digital mixers and a quadrature NCO, as shown in the Block Diagram. A decimating (4 to 32) fifth order Cascaded Integrator-Comb (CIC) filter can be applied to the data before it is processed by up to 5 decimate-by-2 halfband filters. The halfband filters are followed by a 255-tap programmable FIR filter. The output data from the programmable FIR filter is scaled by a digital AGC before being re-sampled in a polyphase FIR filter. The output section can provide seven types of data: Cartesian (I, Q), polar (R, θ), filtered frequency (dθ/dt), Timing Error (TE), and AGC level in either parallel or serial format.

 
  Key Features
 
  • Up to 65MSPS Front-End Processing Rates (CLKIN) and 55MHz Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous
  • Processing Capable of >100dB SFDR
  • Up to 255-Tap Programmable FIR
  • Overall Decimation Factor Ranging from 4 to 16384
  • Output Samples Rates to ≈ 12.94MSPS with Output Bandwidths to ≈ 982kHz Lowpass
  • 32-Bit Programmable NCO for Channel Selection and Carrier Tracking
  • Digital Resampling Filter for Symbol Tracking Loops and Incommensurate Sample-to-Output Clock Ratios
  • Digital AGC with Programmable Limits and Slew Rate to Optimize Output Signal Resolution; Fixed or Auto Gain Adjust
  • Serial, Parallel, and FIFO 16-Bit Output Modes
  • Cartesian to Polar Converter and Frequency Discriminator for AFC Loops and Demodulation of AM, FM, FSK, and DPSK
  • Input Level Detector for External I.F. AGC Support
  • Pb-Free Plus Anneal Available (RoHS Compliant)
Related Documentation
 
Application Note(s)   Application Note(s):
 
Datasheet(s)   Datasheet(s):
 
Technical Brief(s)   Technical Brief(s):
 
Evaluation Board(s)   Evaluation Board(s):
 
Technical Homepage   Technical Homepage:
 
 
  Parametric Data
Clock (MHz)65MHz CLKIN 55MHz PROCCLK (Back End)
Data (Bits)14
Decimation Factors4 to 16,384
FilteringFixed CIC Fixed Halfband Programmable FIR Fixed Re-Sampler
 
 
Applications
 
  • Single Channel Digital Software Radio Receivers
  • Base Station Rx’s: AMPS, NA TDMA, GSM, and CDMA
  • Compatible with HSP50210 Digital Costas Loop for PSK Reception
  • Evaluation Platform Available
 
  Related DevicesParametric Table   Parametric Table
 
 HSP50016 Digital Down Converter 
 HSP50210 Digital Costas Loop 
 HSP50216 Four-Channel Programmable Digital DownConverter 
 ISL5216 Four-Channel Programmable Digital DownConverter 
 ISL5416 Four-Channel Wideband Programmable DownConverter 

 

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