The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
Description
The ISL6752 is a high-performance, low-pin-count alternative zero-voltage switching (ZVS) full-bridge PWM controller. Like Intersil’s ISL6551, it achieves ZVS operation by driving the upper bridge FETs at a fixed 50% duty cycle while the lower bridge FETs are trailing-edge modulated with adjustable resonant switching delays. Compared to the more familiar phase-shifted control method, this algorithm offers equivalent efficiency and improved overcurrent and light-load performance with less complexity in a lower pin count package.
The ISL6752 features complemented PWM outputs for synchronous rectifier (SR) control. The complemented outputs may be dynamically advanced or delayed relative to the PWM outputs using an external control voltage.
This advanced BiCMOS design features precision deadtime and resonant delay control, and an oscillator adjustable to 2MHz operating frequency. Additionally, Multi-Pulse Suppression ensures alternating output pulses at low duty cycles where pulse skipping may occur.
Key Features
Adjustable Resonant Delay for ZVS Operation
Synchronous Rectifier Control Outputs with Adjustable Delay/Advance
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