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| ACPI Regulator/Controller for Dual Channel DDR Memory Systems |
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Available in RoHS/Pb-Free
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 Buy direct from Intersil
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 Check distributor inventory
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 Request samples
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Part No. |
Design-In
Status |
Temp. |
Package |
MSL |
Price
US $ |
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| ISL6548CRZA |
Active |
Comm |
28 Ld QFN |
3 |
3.17 |
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| ISL6548CRZA-T |
Active |
Comm |
28 Ld QFN T+R |
3 |
3.17 |
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| ISL6548CRZ |
InActive |
Comm |
28 Ld QFN |
3 |
Contact Us |
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| ISL6548CRZ-T |
InActive |
Comm |
28 Ld QFN T+R |
3 |
Contact Us |
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| The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice. |
| MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020 |
| SMD = Standard Microcircuit Drawing |
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 Description |
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The ISL6548 provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply VDDQ during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (VDDQ/2) high current VTT voltage without the need for a negative supply. Two LDO controllers are also integrated for the GMCH core voltage regulation and for the GMCH/CPU VTT termination voltage regulation.
The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectified buck converter topology. The synchronous buck converter uses voltagemode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH/CPU VTT termination voltage is within spec and operational.
Each output is monitored for undervoltage events. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated. |
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 Key Features |
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Generates 4 Regulated Voltages
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Synchronous Buck PWM Controller for DDR VDDQ
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3A Integrated Sink/Source Linear Regulator with Accurate VDDQ/2 Divider Reference for DDR VTT
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LDO Regulator for GMCH Core
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Sink/Source LDO Regulator for CPU/GMCH VTT Termination
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ACPI Compliant Sleep State Control
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Glitch-free Transitions During State Changes
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PWM Controller Drives Low Cost N-Channel MOSFETs
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250kHz Constant Frequency Operation
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Tight Output Voltage Regulation
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All Outputs: ±2% Over Temperature
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Fully-Adjustable Outputs with Wide Voltage Range: Down to 0.8V supports DDR and DDR2 Specifications
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Simple Single-Loop Voltage-Mode PWM Control Design
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Fast PWM Converter Transient Response
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Under and Overvoltage Monitoring on All Outputs
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OCP on the Switching Regulator
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Integrated Thermal Shutdown Protection
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Pb-Free Plus Anneal Available (RoHS Compliant)
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| Related Documentation |
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 Application Note(s): |
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 Datasheet(s): |
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 Parametric Data |
| | VIN (min) (V) | | 4.5 | | | VIN (max) (V) | | 5.5 | | | VOUT1 (min) (V) | | .8 | | | VOUT1 (max) (V) | | VIN | | | VOUT2 (V) | | 50% of VOUT1 | | | VOUT3 (V) | | Adjustable down to 0.8V | | | VOUT4 (V) | | Adjustable down to 0.8V | | | IOUT1 (A) | | 25 | |
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 Application Block Diagrams |
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| Applications |
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- Single and Dual Channel DDR Memory Power Systems in ACPI compliant PCs
- Graphics Cards - GPU and Memory Supplies
- ASIC Power Supplies
- Embedded Processor and I/O Supplies
- DSP Supplies
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