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| Four-Channel Wideband Programmable DownConverter |
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Available in RoHS/Pb-Free
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 Buy direct from Intersil
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 Check distributor inventory
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 Request samples
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Part No. |
Design-In
Status |
Temp. |
Package |
MSL |
Price
US $ |
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| ISL5416EVAL1 |
Active |
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Eval Board |
N/A |
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| ISL5416KI |
Active |
Ind |
256 Ld BGA |
3 |
64.00 |
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| ISL5416KIZ |
Active |
Ind |
256 Ld BGA |
3 |
64.00 |
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| USBINTERFACE-DBEVAL1 |
Active |
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Eval Board |
N/A |
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| The price listed is the manufacturer's suggested retail price for quantities of 1K units. However, prices in today's market are fluid and may change without notice. |
| MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020 |
| SMD = Standard Microcircuit Drawing |
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 Description |
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The ISL5416 Four-Channel Wideband Programmable Digital DownConverter (WPDC) is designed for high dynamic range applications such as cellular basestations where the processing of multiple channels is required in a small physical space. The WPDC combines four channels in a single package, each including: an NCO, a digital mixer, digital filters, an AGC and a resampling filter.
All channels are independently programmable and may be updated in real time. Each of the four channels can select any of the four digital input buses. Each of the tuners can process a W-CDMA channel. Channels may be cascaded or polyphased for increased bandwidth. Selectable outputs include I samples, Q samples, and AGC gain. Outputs from the part are available over the parallel, serial or uP interfaces. |
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 Key Features |
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Up to 95MSPS Input
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Four Parallel 16-bit Fixed or 17-bit Floating Point Inputs
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Programmable RF Attenuator/VGA Control
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32-Bit Programmable Carrier NCO with > 110dB SFDR
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20-bit Internal Data Path
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Filter Functions
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Multi-Stage Cascaded-Integrator-Comb (CIC) Filter
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Two programmable FIR Filters (first up to 32-taps, second up to 64-taps)
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Half Band Interpolation Filter
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Resampling FIR Filter
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Overall decimation from 1 to >4096
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Digital AGC with up to 96dB of Gain Range
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Up to Four Independent 16-bit Parallel Outputs
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Serial Output Option
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16-bit Parallel µP Interface
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1.8V core, 3.3V I/O Operation
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Evaluation Board and Configuration Software available
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Pb-free available
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| Related Documentation |
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 Application Note(s): |
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 Datasheet(s): |
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 Evaluation Board(s): |
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 Technical Homepage: |
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| Other: |
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 Parametric Data |
| | Clock (MHz) | | 95 | | | Data (Bits) | | 16 | | | Decimation Factors | | 4 to >16k | | | Filtering | | CIC HB Programmable FIR Re-Sampler | |
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 Application Block Diagrams |
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| Applications |
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- Basestation Receivers: GSM/EDGE, CDMA2000, UMTS
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| | HSP50016 | | Digital Down Converter | | | | HSP50210 | | Digital Costas Loop | | | | HSP50214B | | Programmable Downconverter | | | | HSP50216 | | Four-Channel Programmable Digital DownConverter | | | | ISL5216 | | Four-Channel Programmable Digital DownConverter | |
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